Search verilog hdl,UART, 300 result(s) found

Four lights switch of marquee (marquee program in verilog_hdl languages)

This is a learning verilog hdl good information, suitable for beginners, explained in detail, from the light into the deep, learning the language, it is a hardware description language for good stuff, good material!...

verilog UART Model

the universal asynchronous receiver and transmitter is used in most microcontrollers and microprocessor the program describes the basic working of the UART model...


it is the program that is used to configure DSP TMS320C6713 comnunicate with PC through UART. the program is simple but it is neccessary for people who are beginner. hope that when beginner read this code they will have overview of DSP and know the way to use it effectively....


This is a proyect made in verilog sours code, the proyect is about of transmit byts from one basys to another 3 basys with a protocol of tranmition and receptions of bytes...

UART verilog

Zip file contains the top-level files and test files. Finished sending and receiving. Delivery module and receiver modules are described in the file at the top level. To define several different communication speed. Send and receive rules are 10 bit is sent at a time. Entirely on serial communicatio...

verilog I2C

Application background hi this is a verilog code ^_^ this is a verilog code ^_^ this is a verilog code ^_^ this is a verilog code ^_^ Key Technology verilog is very good for me verilog is very good for me verilog is very good for me...

VGA verilog display

This experiment can be said to be a classic verilog experiments, through the camera code is displayed in the display graphics. RGB color control code, and the corresponding position, can obtain any desired image. Code pin assignment based on DE2 board, has been successfully implemented display. Deta...

verilog string and transform

1.    using hdl verilog language circuit and its testing procedures, the completion of the serial data stream is converted to 8BIT parallel data stream output;...

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