▍reconfigurable fir filter vhdl code
this is an fir filter implementation code for a reconfigurable fir filter design coded in vhdl language...
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▍VHDL for 16 bit Time Domain Convolution
Convolution is a common operation in digital signal processing. In this project, I created a custom circuit implemented on the Nallatech board that exploits a significant amount of parallelism to improve performance compared to a microprocessor. Convolution takes as input a signal and a kernell The...
▍turbo coder
日志-BCJRARCHITECTUREConventionalLUT-日志-BCJR 体系结构的能量消耗不通过简单 reducingtheir 时钟频率和吞吐量大大减少。这促使我们新型建筑便开始步入 ACS 基础电路系统是专门为了在具有最少的硬件复杂度，因此较低的能耗。< 跨度 s...
▍8 bit CPU design
height:1.5;">组成CPU的基本部件有运算部件、寄存器组、微命令产生部件和时序系统等。这些部件通过CPU内部的总线连接起来，实现他们之间的信息交换。其中运算部件和一部分寄存器属于运算器部分；另一部分寄存器属于、微命...
▍VHDL simulation of direct sequence spread spectrum communication system
size:14px;font-family:宋体;">直接序列扩频通信系统： 包含： 信源、扰码、交织、直扩、BPSK调制、解调、相关、解交织、解扰 等多个部分，经过QuartusII 9.0编译仿真验证可行。 代码全原创，内含系统报告手册一份。...
▍Study on Turbo Code decoder and FPGA implementation.
MAP algorithm for FPGA design and implementation. In Turbo yards of FPGA design and achieved part, main for has Turbo yards of compiled yards device in the all important module for has design and achieved, such as coding device in the RSC component decoder, and interwoven device, and decoder in the...
▍OFDM Modulation and Demodulation
size:14px;">Cyclic prefix insertion is commonly used in orthogonal frequency division multiplexing (OFDM) systems as a way to mitigate the effects of intersymbol-interference (ISI). It copies the end section of an inverse fast Fourier transform (IFFT) packet to the beginning...
▍Micron Nand Flash controller
size:14px;">containing ECC function...
▍VHDL realization of 3*3 matrix multiplication
Matrix multiplication vhdl implementation, dimension fixed, very instructive.Focus on understanding the interface, timing settings, delay control. Because the structure is relatively clear, not added stimulus file, you can write your own....
▍LED blink code in VHDL
space:nowrap;">LED blink code in VHDL...
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