Home » Source Code » use nios and verilog hdl to create tcp/ip communication by using DM9000A, it can work up to 5Mb/s

use nios and verilog hdl to create tcp/ip communication by using DM9000A, it can work up to 5Mb/s

dongfeng074
2016-05-05 09:55:40
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DM9000A verilog HDL  NIOSDM9000A verilog HDL NIOS AllAll

Description

use nios and verilog hdl to create tcp/ip communication by using DM9000A, it can work up to 5Mb/s. i have use it in DE2 board,you download it and can copy to your project and then use it directly
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File list

Tips: You can preview the content of files by clicking file names^_^
Name Size Date
.lock0.00 B27-06-05|20:34
.markers242.00 B28-10-05|17:33
.properties81.00 kB05-09-05|12:45
.markers249.00 B28-10-05|17:33
.properties81.00 kB17-07-05|01:04
.location69.00 B24-10-05|21:30
.properties33.00 kB24-10-05|21:54
108.tree41.89 kB28-10-05|17:33
org.eclipse.core.resources268.00 B28-10-05|17:33
org.eclipse.cdt.core.prefs95.00 B28-10-05|17:33
org.eclipse.cdt.debug.core.prefs637.00 B28-10-05|17:33
org.eclipse.cdt.ui.prefs91.00 B28-10-05|17:33
org.eclipse.ui.prefs79.00 B28-10-05|17:33
dialog_settings.xml65.00 B28-10-05|17:33
workbench.xml7.86 kB28-10-05|17:33
version.ini26.00 B28-10-05|17:33
install.ptf10.43 kB16-11-05|22:42
bht_ram.mif2.34 kB22-09-05|06:00
button_pio.v4.05 kB22-09-05|06:00
cmp_state.ini3.00 B12-11-05|00:21
cpu_0.ocp808.00 B22-09-05|06:00
cpu_0.v364.56 kB22-09-05|06:00
cpu_0_jtag_debug_module.v11.10 kB22-09-05|06:00
cpu_0_jtag_debug_module_wrapper.v9.32 kB22-09-05|06:00
cpu_0_mult_cell.v5.10 kB22-09-05|06:00
cpu_0_ociram_default_contents.mif5.74 kB22-09-05|06:00
cpu_0_test_bench.v36.54 kB22-09-05|06:00
dc_tag_ram.mif6.59 kB22-09-05|06:00
DE2_NET.pof2.00 MB16-11-05|22:41
DE2_NET.qpf942.00 B26-10-05|19:28
DE2_NET.qsf20.59 kB16-11-05|22:36
DE2_NET.sof821.40 kB16-11-05|22:41
DE2_NET.v10.37 kB16-11-05|22:35
DM9000A.v2.46 kB22-09-05|06:01
DM9000A_IF.v820.00 B22-09-05|06:01
epcs_controller.v17.29 kB22-09-05|06:00
epcs_controller_boot_rom.hex2.53 kB22-09-05|06:00
.cdtbuild2.43 kB29-06-05|09:50
.cdtproject586.00 B29-06-05|14:43
.project623.00 B27-06-05|21:53
application.stf134.00 B05-09-05|11:06
basic_io.h1.03 kB21-07-05|12:11
DM9000A.C8.91 kB22-07-05|15:11
DM9000A.H3.52 kB21-09-05|20:47
hello_led.c1.37 kB22-09-05|09:06
LCD.c1.27 kB07-09-05|09:58
LCD.h610.00 B16-07-05|22:58
nios2-gdb-server.exe.stackdump1.06 kB27-06-05|23:03
Open_I2C.c2.40 kB19-07-05|15:16
Open_I2C.h1.97 kB19-07-05|15:16
readme.txt3.67 kB27-06-05|21:53
Test.c1.73 kB21-07-05|12:10
Test.h480.00 B21-07-05|17:55
.cdtbuild1.74 kB27-06-05|21:53
.cdtproject586.00 B29-06-05|14:43
.project581.00 B27-06-05|21:53
readme.txt1.57 kB27-06-05|21:53
system.stf1.08 kB21-11-05|17:15
I2C_0.v2.71 kB22-09-05|06:00
i2c_master_bit_ctrl.v16.90 kB22-09-05|06:00
i2c_master_byte_ctrl.v10.30 kB22-09-05|06:00
i2c_master_defines.v3.14 kB22-09-05|06:00
i2c_master_top.v9.87 kB22-09-05|06:00
ic_tag_ram.mif1.84 kB22-09-05|06:00
ISP1362.v3.45 kB22-09-05|06:01
ISP1362_IF.v1.21 kB22-08-05|12:21
jtag_uart_0.v20.36 kB26-10-05|19:30
lcd_16207_0.v1.97 kB22-09-05|06:00
lcd_ctrl_pio.v1.76 kB29-06-05|11:34
lcd_data_pio.v2.90 kB29-06-05|11:34
lcd_pio.v1.70 kB29-06-05|10:40
led_green.v1.72 kB22-09-05|06:00
led_pio.v1.70 kB07-07-05|17:38
led_red.v1.70 kB22-09-05|06:00
nios_0.ptf132.11 kB22-09-05|06:17
nios_0.v495.68 kB22-09-05|06:01
nios_0_generation_script740.00 B26-10-05|19:30
onchip_memory_0.hex38.53 kB27-06-05|20:39
README.txt1.62 kB26-10-05|22:08
Reset_Delay.v232.00 B10-07-05|15:32
rf_ram_a.mif600.00 B22-09-05|06:00
rf_ram_b.mif600.00 B22-09-05|06:00
sdram_0.v22.52 kB22-09-05|06:00
sdram_0_test_component.v8.28 kB22-09-05|06:01
SDRAM_PLL.v8.39 kB27-06-05|21:59
SEG7_Display.v2.15 kB22-09-05|06:00
SEG7_LUT.v705.00 B22-09-05|06:00
SEG7_LUT_8.v657.00 B22-09-05|06:00
sram_0.v2.52 kB22-09-05|06:00
SRAM_16Bit_512K.v852.00 B22-09-05|06:00
sram_addr.v1.73 kB11-07-05|17:10
sram_data.v2.19 kB11-07-05|17:10
sram_wr.v1.70 kB11-07-05|17:10
switch_pio.v1.66 kB22-09-05|06:00
sysid.v1.16 kB22-09-05|06:00
timer_0.v6.51 kB22-09-05|06:00
timer_1.v6.51 kB22-09-05|06:00
uart_0.v31.68 kB26-10-05|19:30
class.ptf5.27 kB22-08-05|12:19
DM9000A_IF.v820.00 B22-08-05|12:19
mk_user_logic_DM9000A.pl456.00 B22-08-05|12:19
class.ptf5.81 kB11-07-05|21:12
i2c_master_bit_ctrl.v16.90 kB11-07-05|21:12
i2c_master_byte_ctrl.v10.30 kB11-07-05|21:12
i2c_master_defines.v3.14 kB11-07-05|21:12
i2c_master_top.v9.87 kB11-07-05|21:12
mk_user_logic_Open_I2C.pl536.00 B11-07-05|21:12
class.ptf4.76 kB11-07-05|14:03
mk_user_logic_SEG7_LUT_8.pl469.00 B11-07-05|14:03
SEG7_LUT.v705.00 B11-07-05|14:03
SEG7_LUT_8.v657.00 B11-07-05|14:03
class.ptf5.55 kB11-07-05|21:16
mk_user_logic_SRAM_16Bits_512K.pl466.00 B11-07-05|21:16
SRAM_16Bit_512K.v852.00 B11-07-05|21:16
hello_led_00.00 B12-09-08|15:36
hello_led_0_syslib0.00 B12-09-08|15:36
Nios0.00 B0|0
.projects0.00 B12-09-08|15:36
.root0.00 B12-09-08|15:36
.safetable0.00 B12-09-08|15:36
.settings0.00 B12-09-08|15:36
org.eclipse.core.resources0.00 B12-09-08|15:36
org.eclipse.core.runtime0.00 B12-09-08|15:36
org.eclipse.ui.workbench0.00 B12-09-08|15:36
.plugins0.00 B12-09-08|15:36
.metadata0.00 B12-09-08|15:36
.sopc_builder0.00 B12-09-08|15:36
hello_led_00.00 B12-09-08|15:36
hello_led_0_syslib0.00 B12-09-08|15:36
user_logic_DM9000A0.00 B12-09-08|15:36
user_logic_Open_I2C0.00 B12-09-08|15:36
user_logic_SEG7_LUT_80.00 B12-09-08|15:36
user_logic_SRAM_16Bits_512K0.00 B12-09-08|15:36
DM9000A0.00 B0%|12-09-08
...
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use nios and verilog hdl to create tcp/ip communication by using DM9000A, it can work up to 5Mb/s (539.80 kB)

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