这个实验可以说是verilog入门最基础的实验了,我们不做太多的理论分析,实践是硬道理。 当CPLD的I/O( FM)为低电平时,三极管导通, 蜂鸣器发声。其中包含分频的代码,管脚分配基于DE2板。已在板上实现,无错误。...">
Home » Source Code » Verilog frequency buzzer

Verilog frequency buzzer

贺hychyc
2016-01-25 02:20:43
The author
View(s):
Download(s): 0
Point (s): 1 
Category Category:
Verilog,分频,蜂鸣器Verilog,分频,蜂鸣器 AllAll

Description

family:Simsun;line-height:16.2px;background-color:#FFFFFF;">这个实验可以说是verilog入门最基础的实验了,我们不做太多的理论分析,实践是硬道理。 当CPLD的I/O( FM)为低电平时,三极管导通, 蜂鸣器发声。其中包含分频的代码,管脚分配基于DE2板。已在板上实现,无错误。
Sponsored links

File list

Tips: You can preview the content of files by clicking file names^_^
Name Size Date
install.ptf7.13 kB17-10-08|18:53
clkdiv.asm.rpt8.66 kB13-12-15|16:33
clkdiv.cdf326.00 B18-11-08|19:10
clkdiv.done26.00 B13-12-15|16:33
clkdiv.eda.rpt6.80 kB13-12-15|16:33
clkdiv.fit.rpt170.32 kB13-12-15|16:33
clkdiv.fit.smsg703.00 B13-12-15|16:33
clkdiv.fit.summary610.00 B13-12-15|16:33
clkdiv.flow.rpt7.99 kB13-12-15|16:33
clkdiv.jdi225.00 B13-12-15|16:33
clkdiv.map.rpt19.86 kB13-12-15|16:33
clkdiv.map.summary462.00 B13-12-15|16:33
clkdiv.pin76.85 kB13-12-15|16:33
clkdiv.pof2.00 MB13-12-15|16:33
clkdiv.qpf909.00 B17-10-08|18:52
clkdiv.qsf2.57 kB13-12-15|16:33
clkdiv.qws1.43 kB13-12-15|16:47
clkdiv.sof821.68 kB13-12-15|16:33
clkdiv.sta.rpt81.05 kB13-12-15|16:33
clkdiv.sta.summary644.00 B13-12-15|16:33
clkdiv.tan.rpt57.73 kB23-03-09|21:12
clkdiv.tan.summary971.00 B23-03-09|21:12
clkdiv.v1.10 kB23-03-09|21:11
clkdiv_assignment_defaults.qdf39.26 kB17-03-09|15:27
clkdiv.(0).cnf.cdb1.74 kB13-12-15|16:33
clkdiv.(0).cnf.hdb818.00 B13-12-15|16:33
clkdiv.asm.qmsg2.42 kB13-12-15|16:33
clkdiv.asm.rdb1.48 kB13-12-15|16:33
clkdiv.asm_labs.ddb12.10 kB13-12-15|16:33
clkdiv.cbx.xml88.00 B13-12-15|16:33
clkdiv.cmp.bpm550.00 B13-12-15|16:33
clkdiv.cmp.cdb7.83 kB13-12-15|16:33
clkdiv.cmp.hdb10.76 kB13-12-15|16:33
clkdiv.cmp.idb2.89 kB13-12-15|16:33
clkdiv.cmp.kpt204.00 B13-12-15|16:33
clkdiv.cmp.logdb4.00 B13-12-15|16:33
clkdiv.cmp.rdb21.06 kB13-12-15|16:33
clkdiv.cmp0.ddb53.17 kB13-12-15|16:33
clkdiv.cmp1.ddb52.58 kB13-12-15|16:33
clkdiv.cmp_merge.kpt211.00 B13-12-15|16:33
clkdiv.db_info139.00 B13-12-15|16:26
clkdiv.eda.qmsg3.63 kB13-12-15|16:33
clkdiv.fit.qmsg21.43 kB13-12-15|16:33
clkdiv.hier_info946.00 B13-12-15|16:33
clkdiv.hif422.00 B13-12-15|16:33
clkdiv.ipinfo162.00 B13-12-15|16:47
clkdiv.lpc.html372.00 B13-12-15|16:33
clkdiv.lpc.rdb398.00 B13-12-15|16:33
clkdiv.lpc.txt1.04 kB13-12-15|16:33
clkdiv.map.ammdb122.00 B13-12-15|16:33
clkdiv.map.bpm526.00 B13-12-15|16:33
clkdiv.map.cdb3.69 kB13-12-15|16:33
clkdiv.map.hdb10.16 kB13-12-15|16:33
clkdiv.map.kpt726.00 B13-12-15|16:33
clkdiv.map.logdb4.00 B13-12-15|16:33
clkdiv.map.qmsg4.25 kB13-12-15|16:33
clkdiv.map.rdb1.27 kB13-12-15|16:33
clkdiv.map_bb.cdb1.66 kB13-12-15|16:33
clkdiv.map_bb.hdb8.64 kB13-12-15|16:33
clkdiv.map_bb.logdb4.00 B13-12-15|16:33
clkdiv.pplq.rdb231.00 B13-12-15|16:33
clkdiv.pre_map.hdb9.78 kB13-12-15|16:33
clkdiv.pti_db_list.ddb176.00 B13-12-15|16:33
clkdiv.root_partition.map.reg_db.cdb196.00 B13-12-15|16:33
clkdiv.routing.rdb6.30 kB13-12-15|16:33
clkdiv.rtlv.hdb9.76 kB13-12-15|16:33
clkdiv.rtlv_sg.cdb1.61 kB13-12-15|16:33
clkdiv.rtlv_sg_swap.cdb180.00 B13-12-15|16:33
clkdiv.sgdiff.cdb3.25 kB13-12-15|16:33
clkdiv.sgdiff.hdb10.15 kB13-12-15|16:33
clkdiv.sld_design_entry.sci201.00 B13-12-15|16:47
clkdiv.sld_design_entry_dsc.sci201.00 B13-12-15|16:33
clkdiv.smart_action.txt6.00 B13-12-15|16:33
clkdiv.sta.qmsg10.62 kB13-12-15|16:33
clkdiv.sta.rdb11.36 kB13-12-15|16:33
clkdiv.sta_cmp.6_slow.tdb6.47 kB13-12-15|16:33
clkdiv.syn_hier_info0.00 B13-12-15|16:33
clkdiv.tis_db_list.ddb176.00 B13-12-15|16:33
clkdiv.tmw_info364.00 B13-12-15|16:47
clkdiv.vpr.ammdb348.00 B13-12-15|16:33
logic_util_heursitic.dat2.41 kB13-12-15|16:33
prev_cmp_clkdiv.asm.qmsg2.13 kB23-03-09|21:11
prev_cmp_clkdiv.fit.qmsg12.12 kB23-03-09|21:11
prev_cmp_clkdiv.map.qmsg4.38 kB23-03-09|21:11
prev_cmp_clkdiv.qmsg12.15 kB13-12-15|16:33
prev_cmp_clkdiv.tan.qmsg2.72 kB23-03-09|21:11
clkdiv.db_info139.00 B13-12-15|16:26
clkdiv.root_partition.cmp.ammdb332.00 B13-12-15|16:33
clkdiv.root_partition.cmp.cdb4.47 kB13-12-15|16:33
clkdiv.root_partition.cmp.dfp33.00 B13-12-15|16:33
clkdiv.root_partition.cmp.hdb10.27 kB13-12-15|16:33
clkdiv.root_partition.cmp.kpt209.00 B13-12-15|16:33
clkdiv.root_partition.cmp.logdb4.00 B13-12-15|16:33
clkdiv.root_partition.cmp.rcfdb2.57 kB13-12-15|16:33
clkdiv.root_partition.map.cdb3.56 kB13-12-15|16:33
clkdiv.root_partition.map.dpi670.00 B13-12-15|16:33
clkdiv.root_partition.map.hbdb.cdb1.25 kB13-12-15|16:33
clkdiv.root_partition.map.hbdb.hb_info46.00 B13-12-15|16:33
clkdiv.root_partition.map.hbdb.hdb9.86 kB13-12-15|16:33
clkdiv.root_partition.map.hbdb.sig32.00 B13-12-15|16:33
clkdiv.root_partition.map.hdb10.03 kB13-12-15|16:33
clkdiv.root_partition.map.kpt731.00 B13-12-15|16:33
README653.00 B17-03-09|15:30
clkdiv.sft168.00 B13-12-15|16:33
clkdiv.vo24.99 kB13-12-15|16:33
clkdiv_fast.vo24.99 kB13-12-15|16:33
clkdiv_modelsim.xrf2.73 kB13-12-15|16:33
clkdiv_v.sdo27.42 kB13-12-15|16:33
clkdiv_v_fast.sdo27.74 kB13-12-15|16:33
sopc_builder_debug_log.txt0.00 B17-10-08|18:53
分频计数实验.pdf88.75 kB04-06-10|13:55
实验一、分频计数实验说明.pdf41.96 kB17-03-09|16:08
compiled_partitions0.00 B13-12-15|16:33
modelsim0.00 B13-12-15|16:33
.sopc_builder0.00 B12-12-15|16:45
db0.00 B13-12-15|16:47
incremental_db0.00 B12-12-15|16:45
simulation0.00 B13-12-15|16:33
clkdivverilog0.00 B13-12-15|16:47
ex1_clkdiv0.00 B12-12-15|16:45
...
Sponsored links

Comments

(Add your comment, get 0.1 Point)
Minimum:15 words, Maximum:160 words
  • 1
  • Page 1
  • Total 1

Verilog frequency buzzer (492.42 kB)

Need 1 Point(s)
Your Point (s)

Your Point isn't enough.

Get 22 Point immediately by PayPal

Point will be added to your account automatically after the transaction.

More(Debit card / Credit card / PayPal Credit / Online Banking)

Submit your source codes. Get more Points

LOGIN

Don't have an account? Register now
Need any help?
Mail to: support@codeforge.com

切换到中文版?

CodeForge Chinese Version
CodeForge English Version

Where are you going?

^_^"Oops ...

Sorry!This guy is mysterious, its blog hasn't been opened, try another, please!
OK

Warm tip!

CodeForge to FavoriteFavorite by Ctrl+D